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AMD tries to learn its lessons

AMD tries to learn its lessons

In the months leading up to the launch of Advanced Micro Devices' quad-core Opteron processor, code-named Barcelona, company executives continually harped on its design as distinguishing it from Intel's quad-core offerings.

When 2007 began, AMD looked poised to follow up on the success of its dual-core Opteron chip by manufacturing a quad-core processor that would place four processing cores on a single piece of silicon.

The design of these was a direct assault on Intel's approach to its quad-core offering, which tied two dual-core Xeon processors together.

It now seems that AMD's approach to quad-core design led to some of the numerous problems associated with Barcelona, namely underwhelming clock speed performance, a poor manufacturing ramp-up before its delivery and a bug that could disrupt the hardware.

As the calendar turns to 2008, the company insists that it has learned its lesson and will be able to get its quad-core chips back on track.

AMD plans to have production-ready quad-core Opterons in the hands of partners by the first quarter of 2008 and OEMs are expected to deliver updated systems by the second quarter.

"They [AMD's OEM partners] want to be a little more cautious, and we fully agree with them there, so they are looking for what we are calling the 'fixed' version, and we already have that going toward production right now that will not have this particular erratum," Steve Demski, AMD's Opteron product manager, said in an interview.

"We begin sampling in Q1 and we'll go into production with that in the later part of Q1, and then after about a month of partners working with that, we then expect to see products from them in Q2," Demski said.

Demski explained that Barcelona's design—four cores on the silicon die—and problems associated with that complexity did not allow the company to deliver proper yields.

"We weren't yielding the volumes that we wanted and that's why we had lower volumes than what we expected to have," Demski said. "By then not ramping up the learning curve as quickly as we wanted to, we also ran into this erratum that we discovered several weeks after we ... launched the part."

The main lesson to learn from this, Demski said, is to get future chips into the hands of OEMs faster to allow for more testing and debugging.


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