Ultra-low power sensor chip really knows how to relax
Researchers at the University of Michigan have developed a chip for use in sensors that uses 30,000 times less power when in sleep mode than similar chips. The Phoenix chip is designed to wake every 10 minutes, perform a series of tasks and return to sleep mode.
A new microchip developed by researchers at the University of Michigan uses 30,000 times less power in sleep mode and 10 times less power in active mode than comparable chips now on the market, the university announced Friday.
Intended for use in sensor-based devices such as medical implants, environment monitors or surveillance equipment, the new Phoenix processor consumes just 30 picowatts during sleep mode. A picowatt is one trillionth of a watt -- in theory, the energy stored in a watch battery would be enough to run the Phoenix for 263 years.
Scott Hanson, a U-M doctoral student who co-led the project, will present the design on Friday at the Symposium on VLSI Circuits, which is sponsored by the Institute of Electrical and Electronics Engineers.
Many modern sensors and electronics measure one square millimeter and smaller, so the Phoenix's diminutive size of one square millimeter is not remarkable in itself, the researchers said. What is remarkable, however, is that the Phoenix is the same size as its thin-film battery.
Indeed, batteries are typically larger than the processors they power, drastically expanding the size and cost of the entire system, said David Blaauw, a professor in U-M's department of electrical engineering and computer science.
The battery in an average laptop computer, for example, is about 5,000 times larger than the processor, and it provides only a few hours of power, he noted.
The Phoenix is made out of standard chip-fabrication materials, and is actually based on an older technology than many modern chips are, Blaauw told TechNewsWorld.
"It's a bit counterintuitive, but we found that the newer chip technologies are really good for cases where you want to push performance Verio brings something extra to Linux: reliability. Click to learn about free test., like in a laptop or server," he explained. Sensors, on the other hand, benefit from lower performance, which can be traded off for higher power efficiency.
"Low power consumption allows us to reduce battery size and thereby overall system size," Blaauw explained. "Our system, including the battery, is projected to be 1,000 times smaller than the smallest known sensing system today. It could allow for a host of new sensor applications."
In fact, a group of U-M researchers is testing the Phoenix in a biomedical sensor to monitor eye pressure in glaucoma patients, but other possible applications include sensor networks to monitor air or water or detect movement; sensor-enriched concrete that senses the structural integrity of new buildings and bridges; and robust pacemakers that could take more detailed readings of a patient's health.
The Phoenix's low power usage stems from its sleep mode. Sensors can spend more than 99 percent of their lives in sleep mode, waking only briefly at regular intervals to perform computations, the researchers explained.
"Sleep mode power dominates in sensors, so we designed this device from the ground up with an efficient sleep mode as the No. 1 goal," said Dennis Sylvester, an associate professor in the department of electrical engineering and computer science. "That's not been done before."
Specifically, the Phoenix defaults to sleep, and a low-power timer acts as an alarm clock on perpetual snooze, waking it every 10 minutes for 1/10th of a second to run a set of 2,000 instructions. That list includes checking the sensor for new data, processing it, compressing it into a sort of short-hand and storing it before going back to sleep.
The timer "isn't an atomic clock," Hanson explained. "We keep time to 10 minutes plus or minus a few tenths of a second. For the applications this is designed for, that's OK. You don't need absolute accuracy in a sensor. We've traded that for enormous power savings."
The Phoenix also features a unique power gate design as part of its sleep strategy. Power gates keep the electric current from entering parts of a chip not essential for memory during sleep.
In typical state-of-the-art chips, power gates are wide with low resistance to let through as much electric current as possible when the device is turned on. These chips wake up quickly and run fast, but a significant amount of electric current leaks through in sleep mode.
Engineers for the Phoenix, on the other hand, used much narrower power gates that restrict the flow of electric current. Coupled with its use of an older process technology, the result is a reduction in energy leaks.
"I certainly haven't heard of a device like this -- that's a very small amount of power," Roger Kay, president of Endpoint Technologies, told TechNewsWorld. "This opens up some interesting possibilities in medical applications."
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